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Book Synopsis Automatic Analog Layout Synthesis - from Capacitor Arrays in Data Converters to General Design with Routing by : Pang-Yen Chou
Download or read book Automatic Analog Layout Synthesis - from Capacitor Arrays in Data Converters to General Design with Routing written by Pang-Yen Chou and published by . This book was released on 2021 with total page pages. Available in PDF, EPUB and Kindle. Book excerpt:
The explosive growth and development of the integrated circuit market over the last few years have been mostly limited to the digital VLSI domain. The difficulty of automating the design process in the analog domain, the fact that a general analog design methodology remained undefined, and the poor performance of earlier tools have left the analog
Book Synopsis Analog VLSI Design Automation by : Sina Balkir
Download or read book Analog VLSI Design Automation written by Sina Balkir and published by CRC Press. This book was released on 2003-06-27 with total page 199 pages. Available in PDF, EPUB and Kindle. Book excerpt: The explosive growth and development of the integrated circuit market over the last few years have been mostly limited to the digital VLSI domain. The difficulty of automating the design process in the analog domain, the fact that a general analog design methodology remained undefined, and the poor performance of earlier tools have left the analog
Integrated circuits are fundamental electronic components in biomedical, automotive and many other technical systems. A small, yet crucial part of a chip consists of analog circuitry. This part is still in large part designed by hand and therefore represents not only a bottleneck in the design flow, but also a permanent source of design errors responsible for re-designs, costly in terms of wasted test chips and in terms of lost time-to-market. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.
Book Synopsis Analog Layout Synthesis by : Helmut E. Graeb
Download or read book Analog Layout Synthesis written by Helmut E. Graeb and published by Springer Science & Business Media. This book was released on 2010-09-28 with total page 302 pages. Available in PDF, EPUB and Kindle. Book excerpt: Integrated circuits are fundamental electronic components in biomedical, automotive and many other technical systems. A small, yet crucial part of a chip consists of analog circuitry. This part is still in large part designed by hand and therefore represents not only a bottleneck in the design flow, but also a permanent source of design errors responsible for re-designs, costly in terms of wasted test chips and in terms of lost time-to-market. Layout design is the step of the analog design flow with the least support by commercially available, computer-aided design tools. This book provides a survey of promising new approaches to automated, analog layout design, which have been described recently and are rapidly being adopted in industry.
A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize mixed-signal designs from Verilog code. By using cells that are simple and highly scalable, the same Verilog code may be used to implement the design in any number of process nodes, for rapid portability and scalability. Two different ADC architectures are implemented as proofs of concept: first, a third-order MASH ADC is fabricated in 130nm and 65nm CMOS, taking advantage of the structure's tolerance to the mismatch introduced by the automated place-and-routing. Second, a Nyquist-rate pipeline ADC using the highly-scalable ring amplifier is fabricated in 65nm CMOS. The measurement results from these chips show that synthesized ADCs can achieve moderate performance with drastically reduced design time compared to manual layout.
Book Synopsis Automated Verilog-to-layout Synthesis of ADCs Using Custom Analog Cells by : Allen Waters
Download or read book Automated Verilog-to-layout Synthesis of ADCs Using Custom Analog Cells written by Allen Waters and published by . This book was released on 2015 with total page 132 pages. Available in PDF, EPUB and Kindle. Book excerpt: A procedure for automating the design and layout of analog-to-digital converters (ADCs) is presented. This procedure makes use of the existing synthesis and place-and-route tools that are common in digital circuit design. A method for adding rudimentary analog cells to the standard library is described, allowing the designer to synthesize mixed-signal designs from Verilog code. By using cells that are simple and highly scalable, the same Verilog code may be used to implement the design in any number of process nodes, for rapid portability and scalability. Two different ADC architectures are implemented as proofs of concept: first, a third-order MASH ADC is fabricated in 130nm and 65nm CMOS, taking advantage of the structure's tolerance to the mismatch introduced by the automated place-and-routing. Second, a Nyquist-rate pipeline ADC using the highly-scalable ring amplifier is fabricated in 65nm CMOS. The measurement results from these chips show that synthesized ADCs can achieve moderate performance with drastically reduced design time compared to manual layout.
The performance of analog circuits is critically dependent on layout parasitics, but the layout has traditionally been a manual and time-consuming task. Analog and mixed-signal (AMS) circuits often impose specific parasitics and mismatch requirements on their layout implementation. Designers leverage their prior experience to place devices in specific patterns and configurations to reduce parasitics, the effects of local variation gradients, and layout-dependent effects. The reason behind this is from both the algorithm and software. Automated AMS layout synthesis faces challenges in developing effective place-and-route (PNR) algorithms for high-performance AMS circuits and lacks easily usable and accessible software. This dissertation covers several analog PNR algorithms to improve the quality of automated layout synthesis and the circuit learning methodology targeting further reducing human efforts. The proposed techniques have become critical parts of the open-source AMS layout synthesis software MAGICAL. This dissertation first proposes a novel analog routing methodology. The proposed framework, GeniusRoute, leverages machine learning to provide routing guidance, mimicking the sophisticated manual layout approaches. This approach allows the automatic analog router to follow the design expertise of human engineers while no additional manual effort is required to code the layout strategies. The proposed methodology obtains significant improvements over existing techniques and achieves competitive performance to manual layouts while capable of generalizing to circuits of different functionality. This dissertation also proposes a practical mixed-signal placement framework. Unlike the existing techniques, which mainly focus on geometric constraints in analog building blocks, the proposed framework formulates and effectively optimizes the system-level signal flow for sensitive mixed-signal circuits. Leveraging prior knowledge from schematics, we propose considering the critical signal paths in automatic AMS placement and presenting an efficient framework. The proposed framework shows efficiency and effectiveness with a reduced routed wirelength compared to a state-of-the-art AMS placer and improved post-layout performance. Furthermore, the well generation in the analog layout synthesis flow is revisited. Instead of treating well generation as an isolated process, we propose a new methodology of well-aware placement. We formulate the well-aware placement problem and propose a machine learning-guided placement framework. By allowing well sharing between transistors and explicitly considering wells in placement, the proposed framework achieves more than 74% improvement in the area and more than 26% reduction in half-perimeter wirelength over existing placement methodologies in experimental results. Finally, this dissertation revisits and explores the fundamental problem of analog circuit learning. A novel unsupervised circuit learning framework is proposed to leverage the human layout as a training label. The machine learning model is pre-trained with automatically extracted labels and then transferred to other downstream tasks. The transferrable circuit representation model demonstrates the possibility of a machine learning model to understand the circuits
Book Synopsis Fully-automated Layout Synthesis for Analog and Mixed-signal Integrated Circuits by : Keren Zhu (Ph. D.)
Download or read book Fully-automated Layout Synthesis for Analog and Mixed-signal Integrated Circuits written by Keren Zhu (Ph. D.) and published by . This book was released on 2022 with total page 0 pages. Available in PDF, EPUB and Kindle. Book excerpt: The performance of analog circuits is critically dependent on layout parasitics, but the layout has traditionally been a manual and time-consuming task. Analog and mixed-signal (AMS) circuits often impose specific parasitics and mismatch requirements on their layout implementation. Designers leverage their prior experience to place devices in specific patterns and configurations to reduce parasitics, the effects of local variation gradients, and layout-dependent effects. The reason behind this is from both the algorithm and software. Automated AMS layout synthesis faces challenges in developing effective place-and-route (PNR) algorithms for high-performance AMS circuits and lacks easily usable and accessible software. This dissertation covers several analog PNR algorithms to improve the quality of automated layout synthesis and the circuit learning methodology targeting further reducing human efforts. The proposed techniques have become critical parts of the open-source AMS layout synthesis software MAGICAL. This dissertation first proposes a novel analog routing methodology. The proposed framework, GeniusRoute, leverages machine learning to provide routing guidance, mimicking the sophisticated manual layout approaches. This approach allows the automatic analog router to follow the design expertise of human engineers while no additional manual effort is required to code the layout strategies. The proposed methodology obtains significant improvements over existing techniques and achieves competitive performance to manual layouts while capable of generalizing to circuits of different functionality. This dissertation also proposes a practical mixed-signal placement framework. Unlike the existing techniques, which mainly focus on geometric constraints in analog building blocks, the proposed framework formulates and effectively optimizes the system-level signal flow for sensitive mixed-signal circuits. Leveraging prior knowledge from schematics, we propose considering the critical signal paths in automatic AMS placement and presenting an efficient framework. The proposed framework shows efficiency and effectiveness with a reduced routed wirelength compared to a state-of-the-art AMS placer and improved post-layout performance. Furthermore, the well generation in the analog layout synthesis flow is revisited. Instead of treating well generation as an isolated process, we propose a new methodology of well-aware placement. We formulate the well-aware placement problem and propose a machine learning-guided placement framework. By allowing well sharing between transistors and explicitly considering wells in placement, the proposed framework achieves more than 74% improvement in the area and more than 26% reduction in half-perimeter wirelength over existing placement methodologies in experimental results. Finally, this dissertation revisits and explores the fundamental problem of analog circuit learning. A novel unsupervised circuit learning framework is proposed to leverage the human layout as a training label. The machine learning model is pre-trained with automatically extracted labels and then transferred to other downstream tasks. The transferrable circuit representation model demonstrates the possibility of a machine learning model to understand the circuits
Since its creation in 1884, Engineering Index has covered virtually every major engineering innovation from around the world. It serves as the historical record of virtually every major engineering innovation of the 20th century. Recent content is a vital resource for current awareness, new production information, technological forecasting and competitive intelligence. The world?s most comprehensive interdisciplinary engineering database, Engineering Index contains over 10.7 million records. Each year, over 500,000 new abstracts are added from over 5,000 scholarly journals, trade magazines, and conference proceedings. Coverage spans over 175 engineering disciplines from over 80 countries. Updated weekly.
Book Synopsis The Engineering Index Annual by :
Download or read book The Engineering Index Annual written by and published by . This book was released on 1992 with total page 2264 pages. Available in PDF, EPUB and Kindle. Book excerpt: Since its creation in 1884, Engineering Index has covered virtually every major engineering innovation from around the world. It serves as the historical record of virtually every major engineering innovation of the 20th century. Recent content is a vital resource for current awareness, new production information, technological forecasting and competitive intelligence. The world?s most comprehensive interdisciplinary engineering database, Engineering Index contains over 10.7 million records. Each year, over 500,000 new abstracts are added from over 5,000 scholarly journals, trade magazines, and conference proceedings. Coverage spans over 175 engineering disciplines from over 80 countries. Updated weekly.
Book Synopsis China 1991 International Conference on Circuits and Systems, 16-17 June, 1991, Shenzhen University, Shenzhen, China by :
Download or read book China 1991 International Conference on Circuits and Systems, 16-17 June, 1991, Shenzhen University, Shenzhen, China written by and published by . This book was released on 1991 with total page 526 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Download or read book Science Abstracts written by and published by . This book was released on 1995 with total page 1360 pages. Available in PDF, EPUB and Kindle. Book excerpt:
Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moore's law. Digital circuits benefit from technology scaling to become faster, more energy efficient as well as more area efficient as the feature size is scaled down. Moreover, digital design also benefits from mature CAD tools that simplify the design and cross-technology porting of complex systems, leveraging on a cell-based design methodology. On the other hand, the design of analog circuits is getting increasingly difficult as the feature size scales down into the deep nanometer regime due to a variety of reasons like shrinking voltage headroom, reducing intrinsic gain of the devices, increasing noise coupling between circuit nodes due to shorter distances etc. Furthermore, analog circuits are still largely designed with a full custom design ow that makes their design and porting tedious, slow, and expensive. In this context, it is attractive to consider realizing analog/mixed-signal circuits using standard digital components. This leads to scaling-friendly mixed-signal blocks that can be designed and ported using the existing CAD framework available for digital design. The concept is already being applied to mixed-signal components like frequency synthesizers where all-digital architectures are synthesized using standard cells as basic components. This can be extended to other mixed-signal blocks like digital-to-analog and analog to- digital converters as well, where the latter is of particular interest in this thesis. A voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is an attractive architecture to achieve all-digital analog-to digital conversion due to favorable properties like shaping of the quantization error, inherent anti-alias filtering etc. Here a VCO operates as a signal integrator as well as a quantizer. A converter employing a ring oscillator as the VCO lends itself to an all-digital implementation. In this dissertation, we explore the design of VCO-based ADCs synthesized using digital standard cells with the long-term goal of achieving high performance data converters built from low accuracy switch components. In a first step, an ADC is designed using vendor supplied standard cells and fabricated in a 65 nm CMOS process. The converter delivers an 8-bit ENOB over a 25 MHz bandwidth while consuming 3.3 mW of power resulting in an energy efficiency of 235 fJ/step (Walden FoM). Then we utilize standard digital CAD tools to synthesize converter designs that are fully described using a hardware description language. A polynomial-based digital post-processing scheme is proposed to correct for the VCO nonlinearity. In addition, pulse modulation schemes like delta modulation and asynchronous sigma-delta modulation are used as a signal pre-coding scheme, in an attempt to reduce the impact of VCO nonlinearity on converter performance. In order to investigate the scaling benefits of all-digital data conversion, a VCO-based converter is designed in a 28 nm CMOS process. The design delivers a 13.4-bit ENOB over a 5 MHz bandwidth achieving an energy efficiency of 4.3 fJ/step according to post-synthesis schematic simulation, indicating that such converters have the potential of achieving good performance in deeply scaled processes by exploiting scaling benefits. Furthermore, large conversion errors caused by non-ideal sampling of the oscillator phase are studied. An encoding scheme employing ones counters is proposed to code the sampled ring oscillator output into a number, which is resilient to a class of sampling induced errors modeled by temporal reordering of the transitions in the ring. The proposed encoding reduces the largest error caused by random reordering of up to six subsequent bits in the sampled signal from 31 to 2 LSBs. Finally, the impact of process, voltage, and temperature (PVT) variations on the performance while operating the converter from a subthreshold supply is investigated. PVT-adaptive solutions are suggested as a means to achieve energy-efficient operation over a wide range of PVT conditions.
Book Synopsis Design of VCO-based ADCs by : Vishnu Unnikrishnan
Download or read book Design of VCO-based ADCs written by Vishnu Unnikrishnan and published by Linköping University Electronic Press. This book was released on 2017-03-28 with total page 52 pages. Available in PDF, EPUB and Kindle. Book excerpt: Today's complex electronic systems with billions of transistors on a single die are enabled by the aggressive scaling down of the device feature size at an exponential rate as predicted by the Moore's law. Digital circuits benefit from technology scaling to become faster, more energy efficient as well as more area efficient as the feature size is scaled down. Moreover, digital design also benefits from mature CAD tools that simplify the design and cross-technology porting of complex systems, leveraging on a cell-based design methodology. On the other hand, the design of analog circuits is getting increasingly difficult as the feature size scales down into the deep nanometer regime due to a variety of reasons like shrinking voltage headroom, reducing intrinsic gain of the devices, increasing noise coupling between circuit nodes due to shorter distances etc. Furthermore, analog circuits are still largely designed with a full custom design ow that makes their design and porting tedious, slow, and expensive. In this context, it is attractive to consider realizing analog/mixed-signal circuits using standard digital components. This leads to scaling-friendly mixed-signal blocks that can be designed and ported using the existing CAD framework available for digital design. The concept is already being applied to mixed-signal components like frequency synthesizers where all-digital architectures are synthesized using standard cells as basic components. This can be extended to other mixed-signal blocks like digital-to-analog and analog to- digital converters as well, where the latter is of particular interest in this thesis. A voltage-controlled oscillator (VCO)-based analog-to-digital converter (ADC) is an attractive architecture to achieve all-digital analog-to digital conversion due to favorable properties like shaping of the quantization error, inherent anti-alias filtering etc. Here a VCO operates as a signal integrator as well as a quantizer. A converter employing a ring oscillator as the VCO lends itself to an all-digital implementation. In this dissertation, we explore the design of VCO-based ADCs synthesized using digital standard cells with the long-term goal of achieving high performance data converters built from low accuracy switch components. In a first step, an ADC is designed using vendor supplied standard cells and fabricated in a 65 nm CMOS process. The converter delivers an 8-bit ENOB over a 25 MHz bandwidth while consuming 3.3 mW of power resulting in an energy efficiency of 235 fJ/step (Walden FoM). Then we utilize standard digital CAD tools to synthesize converter designs that are fully described using a hardware description language. A polynomial-based digital post-processing scheme is proposed to correct for the VCO nonlinearity. In addition, pulse modulation schemes like delta modulation and asynchronous sigma-delta modulation are used as a signal pre-coding scheme, in an attempt to reduce the impact of VCO nonlinearity on converter performance. In order to investigate the scaling benefits of all-digital data conversion, a VCO-based converter is designed in a 28 nm CMOS process. The design delivers a 13.4-bit ENOB over a 5 MHz bandwidth achieving an energy efficiency of 4.3 fJ/step according to post-synthesis schematic simulation, indicating that such converters have the potential of achieving good performance in deeply scaled processes by exploiting scaling benefits. Furthermore, large conversion errors caused by non-ideal sampling of the oscillator phase are studied. An encoding scheme employing ones counters is proposed to code the sampled ring oscillator output into a number, which is resilient to a class of sampling induced errors modeled by temporal reordering of the transitions in the ring. The proposed encoding reduces the largest error caused by random reordering of up to six subsequent bits in the sampled signal from 31 to 2 LSBs. Finally, the impact of process, voltage, and temperature (PVT) variations on the performance while operating the converter from a subthreshold supply is investigated. PVT-adaptive solutions are suggested as a means to achieve energy-efficient operation over a wide range of PVT conditions.
Book Synopsis Electrical & Electronics Abstracts by :
Download or read book Electrical & Electronics Abstracts written by and published by . This book was released on 1997 with total page 1904 pages. Available in PDF, EPUB and Kindle. Book excerpt: