Author: Navid Yaghini
Publisher: Library and Archives Canada = Bibliothèque et Archives Canada
Published: 2004
Total Pages: 168
ISBN-13: 9780612953758
DOWNLOAD EBOOKDelta-sigma (DeltaSigma) modulation is a popular technique for making high resolution analog to digital and digital to analog converters (ADC and DAC). This thesis outlines a design procedure for a low power, wide bandwidth, 4th order continuous-time complex bandpass DeltaSigma ADC. System level simulations of the modulator are used to examine the behavior of the modulator in presence of moderate circuit imperfections. The modulator was designed and fabricated in TSMC's 0.18mum CMOS technology. The ADC achieves 68.8dB SNDR in a 23MHz signal bandwidth while consuming 42.6mW from a 1.8V supply. The core area of the IC is 0.95mm2. This work demonstrates the feasibility of implementing a high-resolution high-speed DeltaSigma ADC suitable for a low-IF receiver in deep sub-micron technology using low-gain opamps.
Book Synopsis Design of a Wideband Quadrature Continuous-time Delta-sigma ADC [microform] by : Navid Yaghini
Download or read book Design of a Wideband Quadrature Continuous-time Delta-sigma ADC [microform] written by Navid Yaghini and published by Library and Archives Canada = Bibliothèque et Archives Canada. This book was released on 2004 with total page 168 pages. Available in PDF, EPUB and Kindle. Book excerpt: Delta-sigma (DeltaSigma) modulation is a popular technique for making high resolution analog to digital and digital to analog converters (ADC and DAC). This thesis outlines a design procedure for a low power, wide bandwidth, 4th order continuous-time complex bandpass DeltaSigma ADC. System level simulations of the modulator are used to examine the behavior of the modulator in presence of moderate circuit imperfections. The modulator was designed and fabricated in TSMC's 0.18mum CMOS technology. The ADC achieves 68.8dB SNDR in a 23MHz signal bandwidth while consuming 42.6mW from a 1.8V supply. The core area of the IC is 0.95mm2. This work demonstrates the feasibility of implementing a high-resolution high-speed DeltaSigma ADC suitable for a low-IF receiver in deep sub-micron technology using low-gain opamps.